发明名称 LOOP BACK CONTROL CIRCUIT
摘要 <p>PURPOSE:To execute a loop back test without being affected by the abnormality of a clock supplied from the outside by providing a loop back select part, loop back control part, loop back monitor part and internal clock generation part. CONSTITUTION:A clock monitor part 3 monitors the abnormality of the external clock supplied from the outside for operating a loop back select part 1 and a device to be tested. When any abnormality is detected, the clock supplied to the loop back select part 1 and the device to be tested is automatically switched to an internal clock generated by an internal clock generation part 2 by a loop back control part 4. Thus, without requiring any complicated operations, the loop back test can be executed without being affected by the abnormality of the clock supplied from the outside.</p>
申请公布号 JPH04120940(A) 申请公布日期 1992.04.21
申请号 JP19900240151 申请日期 1990.09.12
申请人 FUJITSU LTD 发明人 RIKIMARU KENJI
分类号 H04L1/22;H04B17/40;H04L7/00;H04L29/14;H04M3/56 主分类号 H04L1/22
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