INTEGRATED CIRCUIT STRUCTURE HAVING A UNIQUE SURFACE METALLIZATION LAYOUT

摘要

A planar monolithic integrated circuit chip containing an isolation region of one conductivity type extending completely around the edge or periphery of the chip in order to insure that there are no exposed P-N junctions on an edge surface of the chip. Such an isolation region extends for at least a minimum distance from the edge of the chip, said distance being determined so as to minimize the risk of any edge defects in the chip resulting from dicing and handling from extending beyond the isolation region into the body of the chip. An insulative layer over the planar surface of the chip supports a metallization pattern for interconnecting the devices in the integrated circuit and for distributing a plurality of voltage supplys at different levels to the devices. The metallization pattern is arranged so that only metallization connected to the voltage supply at the same level as the peripheral isolation region is located on the portion of the insulative layer between the chip edge and the minimum distance of the isolation junction from the edge.