发明名称 |
REDUNDANTE SCHALTUNG FUER EIN HALBLEITERSPEICHERGERAET. |
摘要 |
A redundancy circuit for a semiconductor memory device of the byte configuration type, in which data is read out for each bit, is comprised of a main memory having a plurality of main memory cells arrayed in a matrix fashion, the matrix array being divided into memory sections in the column direction; a spare memory for saving defective memory cells contained in the main memory, the spare memory comprising spare rows of a plurality of spare memory cells arranged in the row direction, the spare row being provided for each of the main memory sections; programmable spare row decoders provided for each row of spare memory cells and for independently selecting each row of the spare memory cell; and main-decoder-disable signal-generating circuits provided for each of the memory sections and for placing all of the row main decoders of the corresponding memory section in non-select state in response to a signal derived from the programmed spare row decoder of the corresponding memory section. |
申请公布号 |
DE3485564(D1) |
申请公布日期 |
1992.04.16 |
申请号 |
DE19843485564 |
申请日期 |
1984.11.07 |
申请人 |
KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP |
发明人 |
SEGAWA, MAKOTO C/O PATENT DIVISION;ARIIZUMI, SHOJI C/O PATENT DIVISION, MINATO-KU TOKYO 105, JP |
分类号 |
G06F12/16;G11C29/00;G11C29/04;(IPC1-7):G06F11/20 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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