| 摘要 |
PURPOSE:To improve electric reliability in a semiconductor integrated circuit device in which memory cells are insulated therebetween by a first conductivity type channel stopper region and an interelement isolating insulating film by providing means for insulating between semiconductor regions even if the insulating film between the second conductivity type semiconductor regions of adjacent two memory cells arranged at least in a data line extending direction has a defect. CONSTITUTION:A p<-> type semiconductor region 21 is formed on an isolation region A in which a field insulating film 13 and a channel stopper region 12 are not formed, and thus conventional capacity and MOS are not formed on the region A. Accordingly, charge is not moved due to ON operation of the MOS between information storage capacity elements C3 and C4 of memory cells MC3 and MC4 arranged in the extending direction of a data line 32. That is, a soft error due to the ON operation of the MOS does not occur. |
