| 摘要 |
<p>PURPOSE:To reduce the battery backup IC of memory RAMs by combining a chip select signal and a read/write signal to select RAMs. CONSTITUTION:The same signal is supplied to RAMs in each column out of RAMs 1, namely, RAMs connected to the same data bus of data 16 to 19 through AND gates 4. Consequently, the number of chip select signal lines 22 is 4. AND outputs between a voltage drop detection signal *MPRT6 which goes to the high level at the time of reduction of the supply voltage and signals *CS7 (*CS(1) to *CS(4)) outputted from a private LSI 5 are outputted to these four chip select signal lines 22 and go to the high level at the time of drop of the supply voltage. Thus, the battery backup IC of the memory is reduced.</p> |
