| 摘要 |
PURPOSE:To shorten both the processing time and the turn-around time by extracting at random the gates out of a logic circuit based on the designated number of gates and the trouble definition number and defining the 0 and 1 degeneration troubles of the input and output pins of the extracted gates. CONSTITUTION:An extraction designating means 11 which performs the input of a keyboard or the designation of a card inputs the number of gates extracted out of a logic circuit 10 and the trouble definition number. A gate extracting means 12 extracts the gates at random out of the circuit 10 based on the parameter inputted by the means 11. Then a trouble defining means 13 defines the 0 and 1 degeneration troubles to all input and output pins of those extracted gates. A test pattern generating means 14 produces automatically or manually a detectable test pattern to the trouble defined by the means 13. A trouble simulation means 15 carries out the simulation of a trouble based on the produced test pattern. Thus the propriety of the test pattern can be easily decided. |
