| 摘要 |
PURPOSE:To make possible the automated processing of a notch part at the time of a design rule check on the mask pattern of a semiconductor integrated circuit having a complicated graphic pattern by a method wherein one part of the notch part is filled with an error graphic pattern and moreover, oversize and undersize processings are performed and a patter, with which the notch part is completely filled, is formed. CONSTITUTION:A formation-of-rectangle processing is performed on a first graphic pattern 1 in a formation-of-rectangle processing means 20, a normal rectangular pattern 3 is formed, a design rule check is performed between the pattern 3 and a second graphic pattern 2 in a design rule checking means 30 and an error graphic pattern 4 is formed. An OR graphic pattern 5 of the patterns 1, 2 and 4 is formed in an OR arithmetic means 40. The outline of the pattern 5 is moved by a length L to the outer side to the pattern 5 in an oversize processing means 50 to form an oversize graphic pattern 6. Subsequently, the outline of the pattern 6 is moved by the length L to the inner side to the pattern 6 in an undersize processing means 60 and an undersize graphic pattern 7 is obtained. Lastly, the patterns 1 and 2 Are replaced with the pattern 7 in a mask pattern update means 70. |
