| 摘要 |
PURPOSE:To enable field withstand voltage and punch-through voltage problems to be solved at this part by placing a gate and a diffusion layer alternately by connecting two MOS transistors in parallel for a MOS transistor for driving a word line. CONSTITUTION:With a MOS transistor Q1 for driving a word line, two gate electrodes 11 are folded back across an element region and are formed in one piece, diffusion layers 131 and 132 where a word line driving line 20 contacts are formed at its outside, and a common source diffusion layer 14 which is connected to a word line WL is formed between the gate electrodes 11. A tip part where the gate electrodes 11 are folded back is an element separation region 22 and a gate electrode 12 of a MOS transistor Q2 for grounding is placed at its tip. Therefore, a plurality of MOS transistors Q1 for drive are arranged and formed while there are no element separation regions for diffusion layer separation. Thus eliminating the need for considering punch-through withstand voltage and field withstand voltage and enabling layout area to be reduced. |
