| 摘要 |
<p>PURPOSE:To shorten the time required for a function check of a decoder by providing a second memory cell array which is connected to plural word lines and does not take part in storage of information, and mixing and placing a conduction type transistor and a non-conduction type transistor in this memory cell array. CONSTITUTION:At the time of test mode, when an output signal (x) of a test signal generating circuit 109 becomes an H level, all decoding lines (a), (b), (c) and (d) of a Y decoder 302 become an L level. In this case, N channel transistors TR N1, N2, N3 and N4 are all turned off. On the other hand, an N channel TR N17 is turned on, when the signal is an H level. Accordingly, digit lines d1, d2, d3 and d4 connected to a memory cell array 307 are all cut off, only a (y) signal of the digit line of a decoder check cell array supplies a signal to a read-out circuit 106, and this signal is outputted to the outside from an I/O terminal I/O through an I/O buffer 305.</p> |
