发明名称 |
Data processing apparatus for dynamically setting timings in a dynamic memory system. |
摘要 |
<p>A data processing system includes a memory controller for accessing a dynamic memory having a plurality of SIMMs that differ in size and speed of operation. The memory controller is operable in response to a request to access a given SIMM to read a SIMM definition register and dynamically produce memory access signals in accordance with the timing requirements of the particular SIMM being accessed. Such signals are set each time a SIMM is accessed. The signals provide different clock periods of RAS precharge time, RAS to CAS time, and CAS pulse width. <IMAGE></p> |
申请公布号 |
EP0479428(A1) |
申请公布日期 |
1992.04.08 |
申请号 |
EP19910307972 |
申请日期 |
1991.08.30 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ALDEREGUIA, ALFREDO;CROMER, DARYL CARVIS;BLAND, PATRICK MAURICE;STUTES, ROGER MAX |
分类号 |
G11C11/401;G06F12/00;G06F12/02;G06F12/06;G06F13/42;G11C11/407 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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