发明名称 Random access memory device having high-speed sense amplifier circuit implemented by bipolar transistors.
摘要 <p>A random access memory device memorizes data bits in memory cells (M11 to Mmn) each implemented by field effect transistors (q11/Q12) arranged in a flip-flop configuration, and one of the data bits are read out to a pair of data signal lines (DB11/DB12) in the form of a small difference in voltage level for increasing the magnitude of the small difference by means of a high-speed sense amplifier unit (26), wherein the small difference is stepped down through a pair of diode elements (D11/D12) so that a pre-amplifying circuit (26a) implemented by bipolar transistors (Q13 to Q16) firstly increases the small difference with voltage levels at the anodes and cathodes of the diode elements, then the differential amplifying circuit (26b) implemented by bipolar transistors (Q17/Q18) starts on increasing a differential voltage level at the output nodes of the pre-amplifying circuit so that the differential amplification is completed within a relatively short time period. &lt;IMAGE&gt;</p>
申请公布号 EP0479098(A2) 申请公布日期 1992.04.08
申请号 EP19910116259 申请日期 1991.09.24
申请人 NEC CORPORATION 发明人 TAKAHASHI, HIROYUKI
分类号 G11C7/06;G11C11/416;G11C11/419 主分类号 G11C7/06
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