| 摘要 |
<p>PURPOSE:To enable the title nonvolatile semiconductor memory to be actuated using a single power supply while the rewriting frequency of data to be increased by a method wherein, during the data erasing step, the drain is electrically floated and later a control gate and a source are respectively impressed with a negative potential and a positive potential. CONSTITUTION:During the writing-in step (A), the source potential Vs is set up to be 0 V so as to boost the control gate voltage Vg up to 12 V. Later, the drain voltage Vd is boosted up to 5 V while the voltage pulse width imposed on the drain 7 at this time is specified to be about 10musec. During the erasing step (B), the control gate voltage Vg is set up to be 12 V with the drain voltage Vd kept in the floating state (C). Later, the source voltage Vs is boosted up to 5 V while the voltage pulse width at that time is specified to be about 100msec.</p> |
