发明名称 HYBRID INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To provide a finer pattern without reducing the areas of an electrode pattern and a resistor pattern by constituting an insulator film layer locally between an electrode film layer and a resistor film layer and by forming the electrode pattern and the resistor pattern in a vertical direction through the insulator film layer. CONSTITUTION:An insulator film layer 4 is formed locally between a resistor film layer 2 and an electrode film layer 3. And by forming a resistor film layer 4 beneath electrode film layers 3A and 3B through the insulator film layer 4, a finer pattern can be formed without reducing the areas of an electrode pattern and a resistor pattern.</p>
申请公布号 JPH04102301(A) 申请公布日期 1992.04.03
申请号 JP19900220213 申请日期 1990.08.22
申请人 NEC CORP 发明人 MASUMOTO YOSHITAKA
分类号 H01C17/242;H01C7/00;H01C17/24;H05K1/16 主分类号 H01C17/242
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