发明名称 CACHE CONTROL SYSTEM
摘要 PURPOSE:To optimize the balance of the processing of the whole system by providing cache control flags corresponding to respective areas (space) that tasks use, setting the flags ON and OFF, and performing cache operation. CONSTITUTION:A cache control flag 2 is set to ON or OFF when a task is loaded in a main memory 1. When access to an area (space) of the main memory 1 where the cache control flag 2 is ON is attained, the cache operation is performed on a cache memory 4 and when access to an area (space) of the main memory 1 where the cache control flag 2 is ON is attained, the cache operation is inhibited on the cache memory 4. Consequently, the cache memory 4 is used preferentially for a task which is high in necessity of fast processing such as real-time processing to perform the fast processing.
申请公布号 JPH04100158(A) 申请公布日期 1992.04.02
申请号 JP19900217823 申请日期 1990.08.18
申请人 PFU LTD 发明人 AMANO TAKAHIRO
分类号 G06F12/08;G06F9/46 主分类号 G06F12/08
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