Data processor synchronous condition switching device - has logic circuit and register holding each attached condition indexed via condition variation clock

摘要

The synchronous condition switching device is used to switch from each attained condition to the next condition within a defined sequence. A condition register (REG) holds each attained condition (PSi) the next condition provided by a logic circuit (LV). The register (REG) is indexed under control of a condition variation clock (ACK). The logic circuit (LV) comprises a chain of coupling devices (VE1...VEn) identifying a corresponding number of conditions, each condition only released when the previous condition is released. Pref. each coupling device (VE1...Ven) uses 2 AND gates end an OR gate. USE - For data processor sequence control.