发明名称 CLOCK SUPPLY SYSTEM FOR MULTI-PROCESSOR SYSTEM
摘要 PURPOSE:To remove the occurrence of system-down owing to the abnormality of a clock signal source by switching a clock signal used for the execution of a data processing to a clock signal which a local clock signal source generates. CONSTITUTION:When a clock monitor means 5 detects the abnormality of the clock signal source 3 since the clock signal from the clock signal source 3 is not supplied for a prescribed period, it gives an instruction for selecting the clock signal which the local clock signal source 4 generates to a clock selection means 6. The clock section means 6 selects the clock signal which the local clock signal source 4 generates and gives it to a hardware mechanism by receiving the instruction. Thus, the means 6 processes the individual processor modules to asynchronously control a system bus 2 and to execute a data processing. Thus, the occurrence of system-down owing to the abnormality of the clock signal source can be removed.
申请公布号 JPH0498353(A) 申请公布日期 1992.03.31
申请号 JP19900211833 申请日期 1990.08.10
申请人 PFU LTD 发明人 AMANO TAKAHIRO
分类号 G06F11/20;G06F1/04;G06F11/00;G06F15/16;G06F15/177 主分类号 G06F11/20
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