| 摘要 |
PURPOSE:To enable the measurement of alignment deviation, by a method wherein a main scale pattern is formed by arranging a first wiring layer, a vernier pattern is formed by arranging a second wiring layer at a position overlapping with a part of the main scale pattern, first and second contact through holes are formed after an insulating film is deposited, and a first and a second electrodes are arranged on the first and the second wiring layers by selectively forming a conducting film. CONSTITUTION:In a region of a P-type silicon substrate 9 divided by a field oxide film 7, a main scale pattern is formed by arranging a first wiring layer 1-1-1-6 with pitches (l). The plane shape of said layer has a strip-form part whose width is (w). A vernier pattern is formed by arranging a second wiring layer 2-1-2-6 with pitches L at a position overlapping with a part of the main scale pattern. The second wiring layer has a strip-form part width is W. After an insulating film 8 is deposited, first and second contact through holes 3-1-3-6 and 4-1-4-6, which correspond with the first and the second wiring layers, respectively, are formed. A conducting film is selectively formed, and first and second electrodes 5-1-5-6 and 6-1--6-6 are arranged on the first wiring layer and the second wiring layer. Electric continuity between both electrodes is checked, thereby measuring alignment deviation. |
