| 摘要 |
PURPOSE:To simulate the interruption of failure current by simulating the failure current overlapped by DC components with an analog arithmetic circuit while line requirements are settled as desired, provided that the simulation is always done at the zero point of the quantity of electricity when the failure current is interrupted. CONSTITUTION:An arithmetic amplifier E in a failure restoration signal circuit 4 always receives an AC output waveform from the part 1 through a resistance R7 and turned to a positive or negative square wave centered on the zero point. This square waveform is applied to a change detector CD and the positive output applied to a terminal s2 of an AND circuit. When a switch SS is at the position of faiure, namely ON, the s2 terminal of the AND circuit AN gives zero and the AN output goes to zero. When the switch SS turns to the position of restoration, namely OFF, the s1 terminal gives 1 and a pulse is applied to an se terminal of FF, whose output goes to 1 to close a switch K. The generation of the pulse occurs only when the output of the arithmetic circuit 1 is zero. The current signal I develops a simulation signal as if failure current were interrupted at the initial zero point and is applied to a power amplifier 5. This ensures the simulation to the interruption of the failure current. |
