发明名称 TEST SERIES FORMATION METHOD
摘要 PURPOSE:To prevent the occurrence of the inconsistency of the allotment of a value for a signal line, by deciding the combination of input pins which generate data containing a target value, from a summary at every output word of a latch allotted to a word unit assembly. CONSTITUTION:If a word that agrees with a target set at a readable and writable memory data output pin, exists in a summary previously made out, a latch 61 output that is the target word, is selected at a selector 66 input signal line, and (1) is allotted to a signal line 68 and (0) is allotted to a signal line 69. When the target does not exist in the summary, retrieval for a word having the largest number of 'don't care' is made within the summary at a step 5, and the selection of a latch 63 is made as the target word, and (1) is allotted to a signal line 70 and (0) is allotted to a signal line 71. Thus, the setting of a value is conducted for a signal line where the value is decided on one meaning from the target value set at the data output pin. As a result, a value given to a readable and writable memory input pin can be decided without inconsistency.
申请公布号 JPH0498169(A) 申请公布日期 1992.03.30
申请号 JP19900215370 申请日期 1990.08.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OTA MITSUHO;MOTOHARA AKIRA
分类号 G01R31/3183;G01R31/28;G06F11/22 主分类号 G01R31/3183
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