发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PURPOSE:To prevent the deterioration of signals on bit lines in high-speed operation by transferring signals through a twisted pair of bit lines formed in upper and lower layers on a substrate. CONSTITUTION:Upper bit lines 1 and 3 are formed above lower bit lines 2 and 4 on a substrate 11. Bit lines are connected through deviated contact holes 5 to form a pair of bit lines and a twisted pair of inverse bit lines. Bit line 201 and inverse bit lines 202 are connected to a sense amplifier 230 to amplify the very low voltage between the two lines. This realizes a smaller memory area than with a single-layer bit line structure and prevents the deterioration of signals on bit lines in high-speed operation. |
申请公布号 |
JPH0494569(A) |
申请公布日期 |
1992.03.26 |
申请号 |
JP19900212920 |
申请日期 |
1990.08.10 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MATSUSHIMA JUNKO;INOUE MICHIHIRO;YAMADA TOSHIRO |
分类号 |
H01L27/10;G11C11/401;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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