发明名称 BYPASS CONTROL SYSTEM
摘要 <p>PURPOSE:To improve the service performance of a broad band integrated services digital network by allowing a node to inform detection of a faulty link to each node directly to execute the bypass processing of each node. CONSTITUTION:A link interrupt detection means 100 detects a faulty link to be accommodated. A link interrupt notice means 200 informs a faulty link 2 to all nodes 1 possibly handling a call via a faulty link 2 when the link interrupt detection means 100 detects the faulty link 2. Then a bypass processing means 300 set a call having been set to be through the faulty link 2 to a predetermined bypass again when the means 300 receives the fault notice of the faulty link 2 from the link interrupt notice means 200. Thus, the node detecting the faulty link informs it to each node directly and the bypass processing in each node is quickly executed. Thus, the service performance of a broad band integrated services digital network is improved.</p>
申请公布号 JPH0494249(A) 申请公布日期 1992.03.26
申请号 JP19900211194 申请日期 1990.08.08
申请人 FUJITSU LTD 发明人 NAKAGAKI SHIGE;HYODO RYUJI;OMURO KATSUMI;NISHINO TETSUO
分类号 H04M3/00;H04L12/28;H04L12/70;H04L12/707;H04L12/801;H04L12/911 主分类号 H04M3/00
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