| 摘要 |
<p>The present invention provides a ECL to CMOS level translation circuit which uses a dynamic, internally generated reference voltage to translate ECL level signals into CMOS level signals. The translator includes an input translation circuit which uses emitter-follower bipolar transistors for receiving and interpreting the ECL level signals and to generate the dynamic, internally generated reference potential, and an output circuit for outputting the CMOS signals. <IMAGE></p> |
