A semiconductor device comprises a semiconductor chip and a memory array (10) constituted by a plurality of memory blocks formed in the semiconductor chip and each having the essentially same construction and a plurality of bit lines (BL) arranged in columns at a predetermined interval. The semiconductor device further comprises a dummy wiring pattern arranged ajacent to the memory array in the semiconductor chip and including a dummy wiring layer (DML) set apart from outermost bit lines of each memory block a distance equal to the predetermined interval.
