| 摘要 |
PURPOSE:To reduce the overhead time to CPU by making a channel itself judge whether a re-try is possible or not and then execute it when an error occurs between the channel and an I/0 controller or when information on the occurrence of abnormality is sent from the I/O side. CONSTITUTION:On the basis of the content of command register 8, IOC control part 9 performs the input-output operations with the I/O control part. Detection part 7 makes a comparison between an instruction sent from the channel and a response made by the IO control part for error detection. In addition, error detection in the channel is also possible; when a machine address sent by the channel disagrees with an address from IOC as to a start sequence, it is judged that an error has occurred and 0 control part 9 informing re-try control part 5 and reset control part 6 of it sends a reset signal to IOC by reset command 6. Control part 6 informs control part 5 of the reset end, set initial instruction address register 4 to register 3 when the re-try is possible, and reads the original instruction at the point in time of the start sequence start, thereby starting input-ouput operation again. |
