| 摘要 |
PURPOSE:To reduce a parasitic capacitance formed between a sourcedrain layer and a semiconductor substrate and to execute a switching operation at high speed by a method wherein an insulating layer is formed directly under a source diffusion layer and a drain diffusion layer. CONSTITUTION:A polysilicon gate electrode 4 is formed, via a gate oxide film 3, on a P-type silicon substrate 1 surrounded by a field oxide film 2. An N-type source 6a and an N-type drain 6b are formed on both sides of the gate electrode 4; an insulating layer 5 is formed directly under them by implanting oxygen ions. When the junction depth of the N-type source 6a and the N-type drain 6b is set at 0.2mum and the oxygen ions are implanted in three stages, e.g. at an energy of 130keV, at an energy of 250keV and at an energy of 500keV, it is possible to form the ion-implantation insulating layer 5 having a width of about 1mum in the depth direction. Thereby, the parasitic capacitance of the N-type source 6a and the N-type drain can be reduced to 1/10 as compared with conventional techniques. |
