发明名称 CHARGEABLE SYSTEM DECODER
摘要 PURPOSE:To obtain a decoder whose display of a scramble and de-scramble state is easy to see at a low cost by ORing entire signals having the scramble obtained from both a video signal and an audio signal, and turning on a display element. CONSTITUTION:When at least one of the video signal and audios 1-4 has the scramble, at least one of the output signals of a scramble signal outputting device 1 goes to 'H', the output of an OR circuit 3 goes to 'H', as well and an LED, D11 is turned on. Also, when the video signal and the entire audios 1-4 don't have any scramble, the output of the logical sum circuit 3 is turned to 'L', so that the LED, D11 can not be turned on. Like this, the LED, D11 indicates that any signal has the scramble or not. Thus, the number of the display elements can be reduced, and the decoder which is easy to see and whose cost is reduced can be obtained.
申请公布号 JPH0492587(A) 申请公布日期 1992.03.25
申请号 JP19900209983 申请日期 1990.08.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HOSOKAWA HIROHISA
分类号 H04N7/167;G06F21/10 主分类号 H04N7/167
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