| 摘要 |
PURPOSE:To prevent a microcomputer from malfunctioning repeatedly by energizing an abnormality display means and inhibiting copying sequence operation when a programmable control means is abnormal. CONSTITUTION:When a microcomputer CPU 1 detects the absence of a zero- cross signal, i.e. a break of AC power supply, the output port PORT 1 of the CPU 1 falls to a low level, and consequently a request for interruption is sent to a microcomputer CPU 2. In response to the request for interruption, the CPU 2 performs a process. A zero-cross break flag (present on RAM 205) is set. If the CPU 1 becomes abnormal during electric feeding, the watch dog timer of a reset IC 202 detects that and applies a reset signal to a terminal RESET of the CPU 2; when a program is restarted, the zero-cross flag is in a reset state and it is therefore judged that it is not after a zero-cross break. In the normal state, 0 is outputted to an output port PORT 1 to reset the zero- cross break flag and then mode control, sequence control, and operation part control are performed repeatedly in order. |
