发明名称 PHASE COMPARATOR AND PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To manufacture an electronic tuner with high reliability and to improve the S/N of a ratio receiver by comparing a reference signal with a compared signal and keeping the output of a phase comparing means into a high impedance state till an operation releasing signal is inputted when the signals are coincident with each other. CONSTITUTION:When a reference signal fR and a compared signal fN are inputted to a 1st signal input fixing means 11A, till a comparison coincidence signal S1 and an operation releasing signal S3 from a phase comparing means 12 are inputted, the compared signal fN is outputted to the phase comparing means 12. Moreover, the phase comparing means 12 compares the reference signal fR with the compared signal fN and when they are once coincident with each other, a comparison coincidence signal S1 is outputted to the 1st signal input fixing means 11A via a control line L. Thus, the 1st signal input fixing means 11A outputs the reference signal fR to the phase comparing means 12 in place of the compared signal fN till the operation releasing signal S3 is inputted.
申请公布号 JPH0490216(A) 申请公布日期 1992.03.24
申请号 JP19900204152 申请日期 1990.08.01
申请人 FUJITSU LTD 发明人 MASAKI SATORU
分类号 H03L7/08;H04B1/10;H04B1/26 主分类号 H03L7/08
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