发明名称 INITIAL STATE SETTING CIRCUIT
摘要 <p>PURPOSE:To ensure the steady operation for the semiconductor ingegrated circuit which performs the digital operation, by providing the control clock generating circuit which operates after the make of the power source, the circuit which rectifies the control clock generating circuit, the circuit which integrates the output of the recrifying circuit, and the circuit which detects the output voltage and then obtaines the desired logic signal for a fixed time respectively. CONSTITUTION:Control clock generating circuit F gives the control to the electronic circuit which receives supply of the same power source VD and on the same semiconductor substrate. The output end of F is connected to one end of voltage rectifying diode D, and the other end of D is connected to the input end of integrating circuit G. Then the output of G is connected to the input end of signal extension circuit K which detects the output voltage of the integrating circuit to deliver the desired logic signal for a fixed time after receiving supply of the same power source VD on the same semiconductor substrate as F. Thus reset output O is formed for the electronic circuit.</p>
申请公布号 JPS55118117(A) 申请公布日期 1980.09.10
申请号 JP19790025295 申请日期 1979.03.05
申请人 NIPPON ELECTRIC CO 发明人 ARIGA MASANORI
分类号 G06F1/24;G06F1/00 主分类号 G06F1/24
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