发明名称 RE-CLOCKING CIRCUIT
摘要 PURPOSE:To improve re-clocking by writing a data signal of a burst of its own subordinate station into a FIFO memory synchronously with a clock recovered from the burst and reading the data from the FIFO memory with a stable clock. CONSTITUTION:Its own station burst detection circuit 4 detects a burst of its own subordinate station from a TDM signal and uses a switch circuit 1 to select an n-channel TDM signal relating to a data signal and writes the data signal of the burst of its own subordinate station from the n-channel TDM signal relating to the data signal outputted from the switch circuit l into a FIFO memory 5 by using a clock synchronously with the data signal. The data signal is read from the FIFO memory 5 by using a stable clock. Thus, the data signal read according to the stable clock in its own system is outputted from the FIFO memory.
申请公布号 JPH0490225(A) 申请公布日期 1992.03.24
申请号 JP19900205540 申请日期 1990.08.02
申请人 SHARP CORP 发明人 YAMAKAWA NAOKI;TADA JUNJI
分类号 H04J3/00;H04B7/212 主分类号 H04J3/00
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