发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce power consumption by installing a low voltage generating circuit so as not to stop the current flowing from the power voltage to GND when the power voltage applied is in the standby state. CONSTITUTION:In the standby state, since a -RAS signal is at high level, a P-type MOS transistor 15 is turned OFF and the current I1 that is supposed to flow from power voltage of 9Vcc to GND through P-type MOS transistor 15, resistor 5R5, N-type MOS transistor 4, and resistor 7R7 does not flow. Further, when the -RAS signal is at high level, the output from inverter 16 becomes low level and a N-type MOS transistor 14 is turned OFF, so that the current I2 that is supposed to flow from power voltage 9Vcc to GND through resistor 6R6, P-type MOS transistor 3, resistor 8R8, and N-type MOS transistor 14 does not flow. That is, in the standby state, both currents I1 and I2 do not flow. When DRAM is set into the operating state, the N-type MOS transistor 14 is also turned ON and acts as a constant voltage generating circuit.
申请公布号 JPH0487367(A) 申请公布日期 1992.03.19
申请号 JP19900204122 申请日期 1990.07.30
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAYAMA AKIO
分类号 H01L27/04;G11C11/407;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
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