发明名称 ON-DELAY CIRCUIT FOR PWM SIGNAL
摘要 <p>PURPOSE:To hold the safety of this circuit by inserting an EX-OR gate to a pair of PWM signals. CONSTITUTION:While defining a pair of PWM signals A and B as one couple to a pair of power transistors 6 and 7, conduction starting time is delayed through a common counter 3b having an EX-OR gate 3a at the input. There after, the respective power transistors 6 and 7 are driven separately for respective signals A' and B' by AND gates 3e and 3f. Therefore, even when a pair of signal inputs are simultaneously turned on by any noise, a pair of power transistors 6 and 7 are simultaneously turned off. Thus, the circuit can be kept safe and reliability can be improved.</p>
申请公布号 JPH0486018(A) 申请公布日期 1992.03.18
申请号 JP19900199856 申请日期 1990.07.27
申请人 MORI SEIKI CO LTD 发明人 GOTO SEIICHI
分类号 H03K5/13 主分类号 H03K5/13
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