发明名称 DELAY CIRCUIT FOR STAIRCASE WAVE SIGNAL
摘要 PURPOSE:To delay staircase wave without deforming waveform by sample holding output of the first circuit that sample holds the staircase wave by a sampling pulse of different phase and outputting. CONSTITUTION:A signal of a signal source 1 is converted to staircase wave in a circuit 2, and added to the first sampling hold circuit 9 through a buffer 4. An output of the circuit 9 is added to the second sampling hold circuit 11 through a buffer 12. An output of the circuit 11 becomes a delay output OUT through the buffer 12. Sampling pulse of different phase from a two-phase pulse oscillating circuit 3 is added to the first and second sampling hold circuits 9, 11.
申请公布号 JPS5834621(A) 申请公布日期 1983.03.01
申请号 JP19810132422 申请日期 1981.08.24
申请人 TRIO KK 发明人 OGAWA ATSUSHI
分类号 H03K5/135 主分类号 H03K5/135
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