| 摘要 |
<p>PURPOSE:To accelerate a processing by using the output terminal of a first level shift part as a first output terminal and using the output terminal of a second level shift part as a second output terminal. CONSTITUTION:The source terminal of a first FET 103 and the source terminal of a second FET 104 are connected to the input terminal of a constant current source 107. The drain terminal of a third FET 105 is used as a first input terminal 111, and the drain terminal of a fourth FET 106 is used as a second input terminal 112. Further, the gate terminal of the third FET 105 and the gate terminal of the fourth FET 106 are connected and used as a third input terminal 115, the output terminal of the first level shift part is used as a first output terminal 113, and the output terminal of the second level shift part is used as a second output terminal 114. Thus, it is not necessary to longitudinally accumulate FETs, and the processing can be accelerated while keeping the operational margin.</p> |
