Device for interconnecting channels.

摘要

Apparatus for efficiently interconnecting OEMI channels of a multiprocessor facility. A plurality of channel adapters (44-47) receive an individual channel from a processor. A supervisory interrupt driven microprocessor (39) receives a link request from a channel adapter when the channel adapter has determined that two logical adapters are in an appropriate architected state. The microprocessor will assign a data bus to channel adapters involved in a link request if certain criteria is met by said link requests, signifying an efficient transfer between said channel adapters (44-47) is likely. <IMAGE>