发明名称 Non-erasable EPROM cell for redundancy circuit.
摘要 <p>A semiconductor electrically programmable read only memory (EPROM) contains an array of memory cells that store data which is erased when the EPROM is exposed to radiation, and also contains redundant memory circuitry. The redundant memory circuit includes one or more rows or columns of redundant memory cells. A programmable redundancy control circuit determines, for each row or column of redundant memory cells, which row or column of defective memory cells it will be used to replace. The programmable redundancy control circuit has a plurality of non-erasable EPROM cells. Distinct metal connection lines, formed from a first metal layer, are coupled to the drain region of each non-erasable EPROM cell for detecting the data stored therein. A metal shield, formed from a second metal layer, overlies the non-erasable EPROM cells and the metal connection lines. Further, vertical metal walls coupled to the metal shield at least partially block radiation from entry under the metal shield. The metal shield and vertical metal walls enable the non-erasable EPROM cells in the programmable redundancy control circuit to be permanently programmed so that each row or column of redundant memory cells can be assigned a permanent address. &lt;IMAGE&gt;</p>
申请公布号 EP0475237(A2) 申请公布日期 1992.03.18
申请号 EP19910114802 申请日期 1991.09.03
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 BERGEMONT, ALBERT M.
分类号 G11C17/00;G11C16/18;H01L21/82;H01L21/822;H01L21/8247;H01L27/04;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C17/00
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