发明名称 Balancing network for parallel connected transistors
摘要 In conjunction with parallel connected transistors, a balancing network including a load-current sensing resistance in the emitter/collector path of each transistor and a shunt resistance connected between the sensing resistor and the base to control base current and a ring network of resistances connected to the bases to force equal distribution of base current.
申请公布号 US5097142(A) 申请公布日期 1992.03.17
申请号 US19900628540 申请日期 1990.12.17
申请人 MOTOROLA, INC. 发明人 YAP, CHOON M.
分类号 H03K17/12 主分类号 H03K17/12
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