发明名称 Method of manufacturing a bipolar CMOS device
摘要 A well with a low impurity concentration is provided as a collector region on a semiconductor substrate. A trench is formed in a portion of the well from the surface toward the inside thereof. An insulating film, serving as a barrier against impurities, is formed on the side wall of the trench. Impurities are introduced through the trench and diffused to a high concentration into the well, thereby forming a high impurity concentration collector region which is connected to the collector electrode of the bipolar transistor. With the above-mentioned structure, the steps of diffusing antimony to a high concentration and growing an epitaxial silicon layer, which are indispensable to the prior art, are eliminated.
申请公布号 US5096843(A) 申请公布日期 1992.03.17
申请号 US19900523358 申请日期 1990.05.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KODAIRA, YASUNOBU
分类号 H01L29/73;H01L21/331;H01L21/74;H01L21/8249;H01L27/06;H01L29/41;H01L29/732 主分类号 H01L29/73
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