发明名称 METHOD AND APPARATUS FOR SINGLE STEP CLOCKING ON SIGNAL PATHS LONGER THAN A CLOCK CYCLE
摘要 An apparatus and method allows for starting and stopping of computer system clocks where the propagation length of signal paths exceed one clock cycle in length. A circular source buffer is provided at the source end of a signal path and saves the data presented on the signal path during every clock cycle. When the system clock has been stopped and is to be restarted, the data stored in the source buffer is copied to a corresponding destination buffer located in the destination end of the signal path. A multiplexer under hardware control located at the destination end of the signal path determines whether the destination receives data from the destination buffer or from the signal path.
申请公布号 AU8439191(A) 申请公布日期 1992.03.17
申请号 AU19910084391 申请日期 1991.07.16
申请人 SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP 发明人 DOUGLAS R BEARD
分类号 G06F9/38;G06F11/22;G06F11/28;G06F11/30;G06F11/36 主分类号 G06F9/38
代理机构 代理人
主权项
地址