发明名称 DIGITAL SYNCHRONIZATION CONTROL METHOD IN CONVEYER
摘要 PURPOSE:To heighten the accuracy of controlling synchronization of parent and child conveyers by digitally processing all the steps of setting a coefficient of synchronization pitch and comparing and computing the compensating count value of the child conveyer and the pulse count value of the parent conveyer at least. CONSTITUTION:Pulses sent from pulse transmitters 3, 4 respectively coupled to interlock with parent and child conveyers 1, 2 are respectively binary added by forward counters A, B, and the pulse count value of the child conveyer is divided by a coefficient (k) of synchronization pitch set by a setting device 6 in an arithmetic circuit. The division result is converted to a compensating count value for return-to-zero when it is the maximum value in the same number of digits as that of pulse count digits of the parent conveyer. The correcting count value of the child conveyer and the pulse count value of the parent conveyer are compared by a parent-child synchronization reference comparison arithmetic circuit 15, and a child conveyer driving speed set value 14 is corrected through addition and subtraction by the compensating value 16 from the circuit 15 to synchronize the driving speed of the child conveyer to the driving speed of the parent conveyer.
申请公布号 JPS60157414(A) 申请公布日期 1985.08.17
申请号 JP19830153852 申请日期 1983.08.22
申请人 DAIFUKU KIKO KK 发明人 KUBOTA HIROSHI
分类号 B65G43/00;B65G43/10 主分类号 B65G43/00
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