| 摘要 |
<p>PURPOSE:To realize the high efficiency of erasure operation by executing the erasure operation against a memory cell array in which nonerasure memory cell is detected when the memory cell in a nonerasure state is detected at the time of executing verification operation. CONSTITUTION:When the one word verification of respective memory cell arrays 1A and 1B is finished, an erasure verification control circuit 7' controls respective source line switches 9A and 9B when at least one of registers 60A and 60B is set based on the respective set/reset state of the registers 60A and 60B, and performs erasure pulse application operation to memory cell arrays 1 (1A, 1B) on a set register 60 side. Thus, the erasure operation can be efficiently performed without generating overerasure.</p> |
