EVALUATION METHOD OF SEMICONDUCTOR INTERFACE,申请号JP19900196569-传众专利搜索

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发明名称	EVALUATION METHOD OF SEMICONDUCTOR INTERFACE
摘要
申请公布号	JPH0482246(A)	申请公布日期	1992.03.16
申请号	JP19900196569	申请日期	1990.07.25
申请人	SUMITOMO ELECTRIC IND LTD	发明人	TAKEBE TOSHIHIKO;KIYAMA MAKOTO;SHIRAKAWA FUTATSU
分类号	H01L21/66	主分类号	H01L21/66
代理机构		代理人
主权项
地址

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