发明名称 Circuit arrangement for protecting electronic circuits against overvoltage
摘要 A circuit arrangement for protecting electronic circuits against overvoltage, having series stabilisation, has a VMOS transistor (2) as a series regulator which is fully driven up to a selected upper limit value of the input voltage. A disconnection controller (3, 6) drives the VMOS transistor (2) into the completely blocked state when a threshold switch (3) triggers as a consequence of the upper limit value of the input voltage being exceeded. <IMAGE>
申请公布号 DE3425235(C1) 申请公布日期 1992.03.12
申请号 DE19843425235 申请日期 1984.07.14
申请人 BSO STEUERUNGSTECHNIK GMBH, 6603 SULZBACH, DE 发明人 MORSCH, JOACHIM, 6690 ST WENDEL, DE
分类号 H02H3/20 主分类号 H02H3/20
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