发明名称 FAULT PROCESSING SYSTEM
摘要 PURPOSE:To assure the fault processing and a normal operation after the fault processing by copying a control program including the fault processing program of a ROM onto a RAM and performing the due processing based on the copied control program. CONSTITUTION:When an error report signal 8 is applied to a CS switching circuit 5, the circuit 5 applies a signal 9 to a wait circuit 6. At the same time, the circuit 5 separates a RAM 3 from an internal bus 7 and connects a ROM 2 to the bus 7 so as to read a control program 10A out of the ROM 2. When the signal 9 is applied to the circuit 6, the circuit 6 applies a wait signal to a processor 1 and reduces the access speed of the processor 1 down to a level corresponding to the response speed of the ROM 2. Meanwhile the processor 1 transfers the control to a fault processing program 10A-a with the signal 8 and reads the program 10A out of the ROM 2. Therefore the processor 1 performs the fault processing based on the program 10A-a.
申请公布号 JPH0474241(A) 申请公布日期 1992.03.09
申请号 JP19900187089 申请日期 1990.07.17
申请人 NEC CORP 发明人 KAWAZOE HIROBUMI
分类号 G06F11/10;G06F9/22;G06F11/14;G06F12/16;G06F15/78 主分类号 G06F11/10
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