| 摘要 |
<p>PURPOSE:To increase an integration density by a method wherein a lower-part gate electrode faces a memory-natured insulating film, and a memory transistor and a selective transistor are connected in series in a semiconductor layer. CONSTITUTION:The central part is used as a memory transistor T1 and both of its side parts are used respectively as selective transistors T2. The transistor T1 is constituted of the following: a semiconductor layer 2; a source electrode and a drain electrode S, D; a memory-natured insulating film 4; a lower-part gate insulating film 5; and a lower-part gate electrode G1. The transistors T2 are constituted of the following: the semiconductor layer 2; the source and drain electrodes S, D; the lower-part gate insulating film 5; an upper-part gate insulating film 6; and an upper-part gate electrode G2. The whole region of a part faced with the electrode G1 is used as a channel region G1 for the transistor T1 and it is possible to increase an integration density.</p> |
