发明名称 RS FLIP-FLOP CIRCUIT
摘要 <p>PURPOSE:To prevent the destruction of the data held by an RS flip-flop circuit that is caused by the glitch noise by controlling the back gate bias voltage of a P channel type MOS transistor TR. CONSTITUTION:The substrate voltage of a P channel type MOS TR is controlled by noting the back gate effect of a MOB TR. In other words, the back gate effect is produced when the substrates of the P channel type MOS TR 6, 7, 10 and 11 are biased to a fixed positive potential via a control terminal 5. Then the drain currents of these TR 6-11 are reduced and therefore the charging currents flowing to the 1st and 2nd output terminals 3 and 4 are also reduced. As a result, the potentials of both terminals 3 and 4 are not satisfactorily reduced and kept at each precedent level if the period of time when a set terminal 1 or a reset terminal 2 is set at logic value 'O' is shorter than the switching speeds of the TR 6-11. Thus the data are never destroyed.</p>
申请公布号 JPH0470003(A) 申请公布日期 1992.03.05
申请号 JP19900180905 申请日期 1990.07.09
申请人 NEC ENG LTD 发明人 NAKAYAMA JUN;KATAYAMA TOMIFUMI
分类号 H03K3/3562;H03K3/356 主分类号 H03K3/3562
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