发明名称 HALFTONE PROCESSING CIRCUIT
摘要 <p>PURPOSE:To prevent the deterioration of picture quality with a halftone image despite its reduction by providing a dither generating circuit to a halftone processing circuit to obtain the dummy dither corresponding to the picture signals to be thinned and then comparing equivalently the thinned picture signal with each element of a dither matrix. CONSTITUTION:The dither outputted from a dither generating circuit 5 is compared with the picture signal obtained by sampling the picture signals of each line inputted from an image sensor 1. Thus the binarized signal trains ere successively produced for each line, and the binarized signals set at the positions decided by the reduction rates are thinned out of the binarized signal trains. In this case, the circuit 5 inserts the dummy dithers at the positions of a reduction circuit 8 corresponding to the thinning positions of the binarized signals. Then the thinned picture signals are equivalently compared with the dither matrix at reduction. As a result, the picture quality is never deteriorated for the images reproduced from the thinned binarized signals even though the reduction of the images are carried out by thinning the binarized signals obtained through the dither matrix.</p>
申请公布号 JPH0470057(A) 申请公布日期 1992.03.05
申请号 JP19900181236 申请日期 1990.07.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 KAWADA TOMOYUKI
分类号 G06T3/40;H04N1/393;H04N1/405 主分类号 G06T3/40
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