发明名称 BARREL SHIFTING CIRCUIT
摘要 PURPOSE:To shorten a delay time and to reduce a circuit size by extracting the data of Q bits from (m) barrel shifters. CONSTITUTION:A decoder 10 decodes shift variable specifying signals S1 to S4 and supplies decoded outputs d0 to d15 (namely, specified shift variable) of 16 bits to barrel shifters 11, 12. Thereby, each barrel shifter selects and outputs 16 bits in a certain range corresponding to the shifted variable from 31-bit input data (16 bits on MSB side and 15 bits on the LSB side). Data DOUT to be finally outputted are 32-bit data constituted of data selected and outputted from the barrel shifter 11, i.e. 16-bit data DM (O0 to O15) on the MSB side, and data selected and outputted from the barrel shifter 12, i.e. 16-bit data DL (O16 to O31) on the LSB side.
申请公布号 JPH0471024(A) 申请公布日期 1992.03.05
申请号 JP19900182581 申请日期 1990.07.12
申请人 FUJITSU LTD 发明人 SATO HAJIME;HATADA SUSUMU;TANIAI KOKICHI;FUJIYAMA HIROYUKI;MIYAMOTO JUNJI
分类号 G06F7/00;G06F5/01;G06F7/76;G06T1/60 主分类号 G06F7/00
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