摘要 |
PURPOSE:To suppress the fluctuation of phases of both input and output clocks to the change of the input clock frequency at application of an input clock and at the same time to prevent a big change of the output clock frequency at interruption of the input clock by fixing the input voltage of a voltage control oscillator at a fixed level when an interruption state of the input clock is detected. CONSTITUTION:A phase comparator 1 is provided to output a pulse having the width proportional to the phase difference between an input clock 10 and a feedback clock 20 together with an LPF 2 which outputs the voltage containing a smoothed pulse inputted from the comparator l, and an amplifier 3 which amplifies the voltage inputted from the LPF 2. Furthermore a voltage control oscillator 4 is added to output the clock 20 according to the output voltage supplied from the amplifier 3 together with a detection circuit 5 which changes the input voltage of the oscillator 4 into the set voltage VFR of a power supply 7 via a switch 6 when the clock 10 is interrupted. Thus a big difference of frequencies can be reduced between the clock 20 and the clock 10 which is usually applied. |