发明名称 DUPLEX SYSTEM FOR ELECTRONIC COMPUTER
摘要 PURPOSE:To secure the high reliability of output data to a peripheral device without duplexing an internal circuit and an internal bus by executing plural abnormality generation specifying means in stages and specifying a CPU generating abnormality. CONSTITUTION:When 'inconsistent error' information is continuously outputted from respective bus control modules 23, 33 to arithmetic control modules (ACPs) 22, 32 even when retrying processing is executed, a task being executed at present is abnormally ended as the 2nd specifying means and then retrying processing at a task level is executed. If the 'inconsistent error' is continued even when the retrying processing at the task level is executed, the operation check of hardware is executed by a test program controlled by an operation systems as the 3rd error specifying means, a fault generating position on the hardware is diagnosed and the CPU generating the abnormality can be specified.
申请公布号 JPH0471037(A) 申请公布日期 1992.03.05
申请号 JP19900184614 申请日期 1990.07.12
申请人 TOSHIBA CORP 发明人 TAKAHASHI CHIKAYOSHI
分类号 G06F11/14;G06F11/16;G06F11/18;G06F15/16;G06F15/177 主分类号 G06F11/14
代理机构 代理人
主权项
地址